UTIA and Celoxica Sign a Research Contract on DSP
Last week UTIA and Celoxica signed a research contract under which UTIA will develop selected DSP cores for
programmable logic implementations of next-generation digital-signal processing applications.
For more information see
Celoxica press release.
A short notice was also published in
the June 12 issue of the Czech news portal idnes.cz.
UTIA booth at ARTEMIS Annual Conference
We presented our current research projects at the 3rd ARTEMIS Annual Conference held in Graz, Austria, on May 22-24, 2006, at UTIA booth.
A paper in the Czech Communication Technology Journal
The Czech Communication Technology Journal has published an article about dynamic reconfiguration of FPGAs (in Czech) jointly written by researchers from our department and the Department of Computer Science, Czech Technical University, Faculty of Electrical Engineering.
UTIA in European Electronic Engineer
An article in European Electronic Engineer mentions UTIA research on tools for dynamic reconfiguration for FPGAs.
DDECS 2006 Conference
Our group will present a paper and a poster at the DDECS 2006 conference in Praha, Czech Republic (Apr. 19-22, 2006). The paper describes an FPGA-based fault simulator and its evaluation, the poster shows design and verification methodology for designs with dynamic reconfiguration in Atmel FPSLIC.
Milan Tichy is back from Dublin
We welcome our colleague Milan Tichy back from the Trinity College
Dublin. He was busy there with implementing affine-projections
algorithms in FPGA using logarithmic arithmetic.
He has studied the design of digital adaptive filter at algorithmic
level and its efficient implementation in FPGA devices. Special
attention was payed to the problems of mapping of the algorithms to
the FPGA architecture using the High-Speed Logarithmic Arithmetic (HSLA) library.
His work was financed by the Marie-Curie Fellowship project under the
Sixth Framework Programme of the European Commission.