CAK II
Center for Applied Cybernetics takes advantage of established research background and teams and provide concerted action of leading research groups and hi-tech companies in the country. It offers to its young researchers opportunity for creative growths and top-class working conditions for research and development in a perspective field. The Government investment will pay off in progress in the filed, increase of qualified workforce and directly through the financial growth of participating industrial companies. Our department has joined the project with the Control Systems group. The group deal with the following problems:- Distributed control systems
- Operating systems for Real-Time control
- Internet programming
- Industrial automation and Fieldbuses
- Rapid prototyping
Acronym: | CAK II |
Name: | Centrum aplikovane kybernetiky (Centre for Applied Cybernetics) |
Provider: | Ministry of Education, Youth and Sports |
Project No.: | 1M0567 |
web: | 1M0567 |
Consortium: | Faculty of Electrical Engineering CTU Prague Faculty of Mechanical Engineering CTU Prague Faculty of Electrical Engineering and Communication BUT Brno VSB - Technical University of Ostrava Faculty of Applied Sciences UWB Pilsen Faculty of Technology TBU Zlin Institute of Information Theory and Automation AS CR Institute of Informatics AS CR CertiCon Cygni Neovision UniControls Camea Siemens automobilove systemy ProTyS, Praha Freescale Polovodice CR Praha OSC, Brno SpeechTech, Plzen, CEPS, Plzen |
Duration: | January 2005 - December 2011 |
Project presentations
Project has been presented during- 16th IFAC World Congress in Prague, July 4 - 8,2005, at UTIA & IDEALIST booth. (project presentation)
- the 3rd Annual ARTEMIS Conference in Graz, 23-24 May 2006, at UTIA booth
- IST2006 event in Helsinki, 21-23 November 2006, at the PicoNet stand
Project results
- Adaptive Noise Canceller LS Lattice Demo
- Accelerator for Cross Ambiguity Function for Modern Passive Coherent Locator Systems
- Adaptive Noise Canceller Migration Demo
Presentations
- Dynamic Reconfiguration in FPGA-Based SoC Designs
- Center of Applied Cybernetics
- Reconfiguration of FPGAs: Data Logger in Three FPGA Configurations in Celoxica RC10
- Floating-Point DSP Acceleration in FPGAs: The First Step Towards the SANE Concept
- Reconfigurable Handel-C FSL Accelerators for MicroBlaze
- GSFAP Adaptive Filtering using Log Arithmetic for Resource-Constrained Embedded Systems
- Accelerating MicroBlaze FP Operations
- MicroBlaze Co-Processor: LS Lattice with Order Portability Estimation
- PCORE Accelerators Library - GSFAP
- PCORE Accelerators Library - (N)LMS
- PCORE Accelerators Library - LS Lattice
- Decoding Convolution and Reed-Solomon Code in FPGA
- Image processing for microbiology - Analysis of yeast colony growth
- PCORE Accelerators Library