Video Input/Output IP Cores for Xilinx ZCU102 with Avnet HDMI Input/Output FMC Module
Description
The application note describes video IP cores interfacing a video input and output of the Xilinx ZCU102 evaluation board with Avnet HDMI Input/Output FMC module. The system is designed with Xilinx Vivado 2018.3 tool.
Package Summary
| Title | Video Input/Output IP Cores for Xilinx ZCU102 with Avnet HDMI Input/Output FMC Module |
| Download | zcu102-hio.zip zcu102-hio-v1.pdf |
| License | see Application note for licensing conditions. |
| Package content | ZIP archive with Zynq Ultrascale+ Demo of Full HD HDMI video I/O on Xilinx ZCU102 board. |
| Size | ZIP file: 2368523 Bytes PDF file: 1186691 Bytes |
| Installation notes | See zcu102-hio-v1.pdf |
Result Category
| Project number | Year | RIV category | Comment |
| 8A18013 | 2019 | Gfunk | Functional sample (demo) |