IST 2006 Virtual Booth

• Reconfiguration of FPGAs: Data Logger in Three FPGA Configurations in Celoxica RC10 (.jpg 852 KB)
• Signal Processing at UTIA AV CR - European Projects (.jpg 943 KB)
• Signal Processing at UTIA AV CR - Projects with National Funding (.jpg 722 KB)
• Floating-Point DSP Acceleration in FPGAs: The First Step Towards the SANE Concept (.jpg 711 KB)