Design Time and Run Time Resources for Zynq Ultrascale+ TE0808-04-15EG-1EE with SDSoC 2018.2 Support
Description
The application note describes FitOptiVis design time and run time resources supporting the Zynq Ultrascale+ board and Xilinx SDSoC 2018.2 system level compiler. The concrete board is Zynq Ultrascale+ TE0808-03-15EG-1EE. It works with large Xilinx XCZU15EG-1FFVC900E device with the quad core Arm A53 64 bit, dual Arm Cortex R5 and programmable logic area on single 16nm chip.
The Zynq Ultrascale+ module has the 52 x 76 mm form factor. The Zynq Ultrascale+ board is designed and manufactured by company Trenz Electronic.
Package Summary
| Title | Design Time and Run Time Resources for Zynq Ultrascale+ TE0808-04-15EG-1EE with SDSoC 2018.2 Support |
| Download | TE0808_SDSoC_IMAGEON_FMC_HDMI_701HDMI_5_5_2019.zip AppNote-FitOptiVis-te0808-SDSoC-2018.2-v5.pdf |
| License | see AppNote-FitOptiVis-te0808-SDSoC-2018.2-v5.pdf for licensing conditions. |
| Package content | ZIP archive with SDSoC 2018.2 platform creation project for Zynq Ultrascale+ Systems with Debian OS, compatible with Arrowhead framework and Full HD HDMI video I/O. |
| Size | ZIP file: 23961277 Bytes PDF file: 3789516 Bytes |
| Required tools & platform |
Xilinx SDK 2018.2 |
| Installation notes | See AppNote-FitOptiVis-te0808-SDSoC-2018.2-v5.pdf |
Result Category
| Project number | Year | RIV category | Comment |
| 8A18013 | 2019 | Gfunk | Functional sample (demo) |