Full HD Video Processing in HW with three EdkDSP 8xSIMD Accelerators for TE0715-04-30-3E SoM on TE0701-06 Carrier

Description

This application note describes demos of HW accelerated Full HD HDMI video processing and HW accelerated floating point filters computed in EdkDSP accelerators on the largest Zynq platform with the Kintex PL fabric supported by the free Xilinx Vivado 2015.4 and SDK 2015.4 tool chain:

  • 3 edge detection video processing designs (sh01, sh02, sh03)
    • These demos document the possibility to define different HW paths by different source C/C++ functions. This is important for covering of the borders lines of the parallel processed parts of the frame.
    • HW accelerators can be programmed for the number of processed micro-lines.
    • These demos enable efficient, synchronised parallel execution of accelerated data paths and ARM Cortex A9 standalone C code.
  • 1 motion detection video processing design (md01)
    • This demonstrates the pipelined parallel execution of HW video processing accelerators.
    • HW accelerators work with fixed number of processed micro-lines (1080 micro-lines) in this case.

Evaluation license

The evaluation version of the package can be downloaded from UTIA www pages free of charge.

The evaluation package includes evaluation bitstreams with three (8xSIMD) EdkDSP accelerators working in parallel with the HW-accelerated edge detection and motion detection algorithms for the Full HD HDMIIHDMIO video processing on the Trenz TE0715-04-30-3E module located on the Trenz TE0701-06 carrier with the FMC card and the PMODRS232 adapter.

Package Summary

Title Full HD Video Processing in HW with three EdkDSP 8xSIMD Accelerators for TE0715-04-30-3E SoM on TE0701-06 Carrier
Filename t30e3hm4_V54_IMPORT.zip
t30e3hm4_2015_4.pdf
License t30e3hm4_2015_4.pdf for licensing conditions.
Package content ZIP archive with precompiled Vivado 2015.4 projects demonstrating Full HD Video Processing in HW with three EdkDSP 8xSIMD Accelerators for TE0715-04-30-3E SoM on TE0701-06 Carrier.
Size ZIP file: 84154335 Bytes
PDF file: 5795157 Bytes
Required tools
& platform
Xilinx SDK 2015.4
Installation notes See application note

Result Category

Project number Year RIV category Comment
7H14004 2017 Gfunk Functional sample (demo)

Contact Person

Please, do not hesitate to contact Jiri Kadlec to obtain more information.